SMACD 2018 & PRIME 2018

Europe/Prague
FNSPE CTU

FNSPE CTU

BIOS
    • 13:00 14:00
      Registration opens Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      Tutorials: Design for reliability: from devices to systems Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 16:00 16:20
      Coffee Break 20m Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 16:20 18:20
      Tutorials: From Power Management to Energetic Intelligence: an evolutionary challenge for students, educators and designers Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 08:00 08:20
      Registration opens Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 08:20 09:00
      Opening Session 40m Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 09:00 10:00
      Plenary Talks: Marcel Urban (AMS) Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 10:00 10:20
      Coffee Break 20m Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic

      Company Fair and Poster sessions

    • 10:20 12:00
      PRIME Morning: Analog circuits I Room Atrium (Conference Venue)

      Room Atrium

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 10:20 12:00
      PRIME Morning: Data Converters Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 10:20 12:00
      SMACD Morning: Applications of modeling and design techniques Room 10 (Conference Venue)

      Room 10

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 10:20 12:00
      SMACD Morning: Variability and test Room 115 (Conference Venue)

      Room 115

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 12:00 13:00
      Lunch 1h Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic

      Company Fair and Poster Session

    • 13:00 14:00
      Company Presentations: Gold Sponsors Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      PRIME Afternoon 1: Circuit for memories and security Room 115 (Conference Venue)

      Room 115

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      PRIME Afternoon 1: Modeling, Optimization and Characterization Room 10 (Conference Venue)

      Room 10

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      SMACD Afternoon 1: EDA Competition Session 1 Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      SMACD Afternoon 1: Special Session: Latest advances in variability impact on devices and circuits functionality Room Atrium (Conference Venue)

      Room Atrium

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 16:00 16:20
      Coffee Break 20m Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic

      Company Fair and Poster Session

    • 16:20 17:40
      PRIME Afternoon 2: Power circuits and harvesting Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 16:20 17:40
      PRIME Afternoon 2: Reliability and Resiliency Room Atrium (Conference Venue)

      Room Atrium

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 16:20 17:40
      SMACD Afternoon 2: Design with non-conventional and emerging devices Room 10 (Conference Venue)

      Room 10

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 16:20 17:40
      SMACD Afternoon 2: Machine Learning and knowledge-based design Room 115 (Conference Venue)

      Room 115

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 20:00 22:00
      Welcome Reception 2h Velkoprevorsky palace

      Velkoprevorsky palace

      Velkopřevorské náměstí, Malá Strana
    • 08:00 09:00
      Registration opens Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 09:00 10:00
      Plenary Talks: Sachin Sapatnekar (U. Minnesota) Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
      • 09:00
        Challenges in Analog/Mixed-Signal Design Automation 1h

        The traditional view of electronic design automation has intensively focused on the design, synthesis, and layout of digital circuits. This perspective has been reinforced by the trends from Moore's law, which have seen digital system complexities grow exponentially, prompting an acute need for efficient design tools and flows. In contrast, analog design has remained largely focused on the expert designer. This world view is now changing, for several reasons. First, several tasks in analog design are now at a point where they can be realistically automated, notably tasks related to layout automation. In advanced finFET technologies, the reduction in the degrees of freedom due to restricted design rules actually makes layout automation easier. Second, the clear distinction between analog and digital designs has blurred, with modern designs seeing a great deal of digital-like circuitry that assists in implementing analog functionalities. For these structures, established techniques from digital system design can carry over to enable design automation. Third, the complexity of the mixed-signal design space makes it difficult for designers to fully comprehend and compensate for the impact of phenomena such as process variations and device aging. Especially under stringent design specifications, these complexities create openings for design automation tools that can complement the knowledge of the expert designer. Thus, analog and mixed-signal design, which has long been the bastion of the expert designer, is projected to be the new frontier in design automation. This talk will present a brief history of prior efforts and will overview the set of opportunities and challenges in this emerging field.

        Speaker: Prof. Sachin Sapatnekar
    • 10:00 10:20
      Coffee Break 20m Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic

      Company Fair and Poster Session

    • 10:20 12:00
      PRIME Morning: Analog Circuits II Room Atrium (Conference Venue)

      Room Atrium

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 10:20 12:00
      PRIME Morning: Radio Frequency Circuits and Systems I Room 115 (Conference Venue)

      Room 115

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 10:20 12:00
      SMACD Morning: Circuit synthesis Room 10 (Venue)

      Room 10

      Venue

      Brehova 7, Prague 1, Czech Republic
    • 10:20 12:00
      SMACD Morning: Modeling Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 12:00 13:00
      Lunch 1h Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic

      Company Fair and Poster Presentation

    • 13:00 14:00
      Company Presentations: Silver Sponsors Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      PRIME Afternoon 1: Digital Circuits and Sub-Systems Room 10 (Conference Venue)

      Room 10

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      PRIME Afternoon 1: Radio Frequency Circuits and Systems II Room 115 (Conference Venue)

      Room 115

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      SMACD Afternoon 1: EDA Competition Session 2 Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      SMACD Afternoon 1: Special Session: New Solutions for Analog and Radio-Frequency Layout Synthesis Room Atrium (Conference Venue)

      Room Atrium

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 16:00 16:20
      Coffee Break 20m Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic

      Company Fair and Poster Session

    • 16:20 17:00
      Company Presentations: Bronze Sponsors Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 19:00 20:00
      Prague Guided Walking Tour 1h Conference Venue

      Conference Venue

    • 20:00 23:00
      Gala Dinner 3h TBD

      TBD

    • 08:00 09:00
      Registration opens Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 09:00 10:00
      Plenary Talks: Richard Shi (U. Washington) Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
      • 09:00
        Accelerating Mixed-Signal Design Verification: Turn a SPICE netlist into a SystemVerilog Model 1h

        Design verification is a bottleneck on modern SoC design. Very often, modern SoCs contain both digital blocks and analog blocks. While the metric-driven verification methodology exists for digital verification, analog and mixed-signal design verification relies heavily on SPICE simulation and manual modeling, a process known to be time consuming and error prone. In this talk, we will introduce a new technology that can turn automatically a SPICE netlist into a SystemVerilog model, and thus allows metric-driven digital verification methodologies and tools to be used for analog and mixed-signal design verification. This breakthrough is based on a new theory of signal abstraction developed under a recent DARPA sponsored research program. We will show that how signal-driven abstraction allows various circuit analysis techniques developed in the past several decades including symbolic analysis, Laplace transform, pole/zero extraction and fractional expansion, event-driven analog modeling, interval mathematics, modified nodal analysis, regression, wreal and real number modeling, language compilation, analog assertion, can all be integrated in this unified framework, and to be used in a methodology transparent to designers. Practical examples from 28Gbps SerDes design will be used to illustrate the methodology. In particular, this talk will show the design verification of 28-Gb/s serial transceiver link adaptation and equalization, which were not feasible previously. This research has been supported by the US DARPA IRIS program.

        Speaker: Prof. Richard Shi
    • 10:00 10:20
      Coffee Break 20m Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic

      Company Fair and Poster Session

    • 10:20 12:00
      PRIME Morning: Automotive Circuits and Systems Room 10 (Conference Venue)

      Room 10

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 10:20 12:00
      PRIME Morning: Sensing and Biomedical Circuits I Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 10:20 12:00
      SMACD Morning: High frequency Room 115 (Conference Venue)

      Room 115

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 10:20 12:00
      SMACD Morning: Simulation Room Atrium (Conference Venue)

      Room Atrium

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 12:00 13:00
      Lunch 1h Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic

      Company Fair and Poster Session

    • 13:00 14:00
      Plenary Talks: Roger Panigacci (On Semiconductors) Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
      • 13:00
        Accelerating Mixed-Signal Design Verification: Turn a SPICE netlist into a SystemVerilog Model 1h

        Today’s image sensor solutions for demanding applications like automotive driver assist image sensing, high speed machine vision, and low power battery operated cameras started from relatively modest solutions for pixels and analog readout design. These initial solution options have evolved along different paths. Now the designer must understand the overall image system requirements to decide where and what to process in the pixel domain, analog circuit domain, and digital processing domain. These decisions rely on understanding the fundamentals of imager photon capture, noise components, analog/digital signal processing topology efficiency, and now the impact of 3D wafer stacking on sensor architecture solutions. This talk will review some of the fundamentals of image sensor technology, design, how it evolved to its current state, and the trajectory for what is possibly next.

        Speaker: Mr Roger Panicacci
    • 14:00 16:00
      PRIME Afternoon 1: Emerging and non-CMOS technologies Room 10 (Conference Venue)

      Room 10

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      PRIME Afternoon 1: Sensing and Biomedical Circuits II Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      SMACD Afternoon 1: Data conversion and signal processing Room Atrium (Conference Venue)

      Room Atrium

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 14:00 16:00
      SMACD Afternoon 1: Special Session: Modeling, design and control of power converters with non linear passive power components Room 115 (Conference Venue)

      Room 115

      Conference Venue

      Brehova 7, Prague 1, Czech Republic
    • 16:00 16:20
      Coffee Break 20m Conference Venue

      Conference Venue

      Brehova 7, Prague 1, Czech Republic

      Company Fair and Poster Session

    • 16:20 18:00
      Awards Session and Closing Ceremony 1h 40m Room 103 (Conference Venue)

      Room 103

      Conference Venue

      Brehova 7, Prague 1, Czech Republic